Semiconductor device layers such as, but not limited to, back end of line (BEOL) layers may include three-dimensional features such as, but not limited to, surface bumps fabricated on a surface (e.g., a substrate or previously fabricated layers). The precise heights of the three-dimensional features may be critical for the fabrication of subsequent layers. However, the throughput of height mapping tools having a sufficient resolution to measure the heights of the three-dimensional features is typically low, which in turn negatively impacts the throughput of the entire fabrication process. Therefore, it may be desirable to provide systems and methods to cure the defects identified above.